Deliverables
Public project deliverables of the MADNESS project are listed below. Access to the documents can be requested by sending an e-mail to 
- D1.1: Report on system specification and subsystem definition (M3)
- D2.1
:
Report
on
specification
of
the
hardware
block
interfaces (M3)
- D3.1: Report on the development of a FPGA emulation environment (M12)
- D4.1: First report on design space pruning and scenario-based MPSoC DSE (M12)
- D5.1: Report on fault tolerant models and fault tolerance techniques (M6)
- D5.2: Report on development of self-checking and reconfiguration policies (M12)
- D6.1: First report on support for dynamic runtime management (M12)
- D7.1: First report on compilation toolchain (M12)
- D9.2: Dissemination and exploitation plan 1 (M12)
Press releases
- April 2010 HiPEACinfo no. 22 features an article about the MADNESS project.
(Click here to access the page where a link to the newsletter in PDF format is available.)
- July 2011 HiPEACinfo no. 27 features a short report of the collaboration between USI and UL within the MADNESS project.
(Click here to access the page where a link to the newsletter in PDF format is available.)
Presentations
- 14 October 2011: Towards an ESL Design Framework for Adaptive and Fault-tolerant MPSoCs: MADNESS or not? presented at the ESTIMedia 2011 (slides, poster)
- 7 September 2011: FPGAs for fast DSE of heterogeneous NoC-based MPSoCs presented at the FPL 2011 workshop on EU-funded projects(slides)
- 7 September 2011: Hardware-middleware support for adaptive and reliable MPSoCs presented at the FPL 2011 workshop on EU-funded projects (slides)
- 5 June 2011: Fault Tolerant Network Interfaces for NoCs presented at the 5th Workshop on Diagnostic Services in Network-on-Chips (DSNoC'11) and co-located with the 48th Design Automation Conference (DAC'11), San Diego, California, USA. (slides)
- 6 April 2011: Continuity of service support in MADNESS Project presented at the HiPEAC cluster meetings in Chamonix, France (slides)